Introduction to latest advances in computer architecture. Focuses on processor core design. Topics include simultaneous multithreading, thread level speculation, trace caches, novel out-of-order mechanisms, and energy-efficient processor core designs. Final project is modification/enhancement of an out-of-order processor on an FPGA development system. Prerequisite(s): course 202; and course 125, 225, or equivalent Verilog experience. Concurrent enrollment in course 221L required. Enrollment restricted to graduate students. Enrollment limited to 20. J. Renau
5 Credits
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| 2010-11 |
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