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CMPE125: Logic Design with Verilog
*****PLEASE NOTE--THE SCHEDULE FOR AY 15-16 IS A DRAFT- IT IS NOT OFFICIAL. *****
*****COURSES ARE SUBJECT TO CHANGE*****
Verilog digital logic design with emphasis on ASIC and FPGA design. Students design and verify large-scale systems. Assignments and project use the Verilog Hardware Description Language with emphasis on verification and high-frequency ASIC/FPGA targets. Prerequisite(s): courses 100/L. Concurrent enrollment in course 125L required. Enrollment limited to 40. P. Chan, A. Varma, M. Schlag, J. Renau, M. Guthaus
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