CMPE222, Fall 2011, Section 01: Syllabus

CMPE 222 Syllabus

Course Overview

In this course we will cover the fundamental topics necessary to successfully engineer modern VLSI designs.  This requires that we investigate two overlapping areas of study.  The first gives students an introduction to fabrication technologies and device physics.  This involves learning how modern integrated circuits are manufactured and about their electrical properties. Then we will cover the principles of layout and how to simulate and verify small circuits. In addition, we will present a variety of trade-offs in full-custom design such as circuit style. The course will be project oriented and will be one of the most relevent and practical courses for anyone interested in hardware design.

Web Page

The course web page is at https://courses.soe.ucsc.edu/courses/cmpe222/Fall11. It will be updated with the most recent course information, so please check it frequently.

Course Forum

Project and tool issues will be best answered in the course forum at https://courses.soe.ucsc.edu/courses/cmpe222/Fall11/01/forum (in the left menu). Using the forum allows other students to see common problems and solution. I will not answer any questions by email other than private questions related to your grade.

Important Dates

Midterm is on Tuesday, October 27 in class.
Final is on Monday, December 5 12pm-3pm in class.
The final project report is due on the last day of classes, December 2 12pm.

Prerequisites

You should have prior knowledge of digital logic design and introductory electronics.

Undergradutes may only enroll with instructor approval.

Books

Required

    Digital Integrated Circuits - A Design Perspective, Rabaey, Chandrakasan, & Nikolic, Prentice Hall, 2nd Edition.  (ISBN 0-13-090996-3)
   Additional papers and information will be passed out during class.

Optional

    Logical Effort: Designing Fast CMOS Circuits by Sutherland, Sproull, and Harris (ISBN 1-55860-557-6)
    Introduction to Microelectronic Fabrication by Richard C. Jaeger (ISBN 0-201-14695-9)

Grading Policy

Midterm (15%), Final (15%), Homework (30%),  Final Project (35%), and class attendance/participation (5%).

Two exams will be given. The homework assignments will be computer projects. The project will involve using or writing CAD tools to design circuits, analyzing the results, and a final presentation.

Collaboration on homeworks is strictly prohibited. You can ask someone about a problem to help understand it, but you cannot show them the answer or copy their answer.
Final projects can be individual or in pairs.

No late homeworks are accepted.

Computer Accounts

In this course, you must get an SOE computing account during the first week.