CSE125: Logic Design with Verilog

Verilog digital logic design with emphasis on ASIC and FPGA design. Students design and verify large-scale systems. Assignments and project use the Verilog Hardware Description Language with emphasis on verification and high-frequency ASIC/FPGA targets. May be taught in conjunction with CSE 225 (Formerly Computer Engineering 125.) Prerequisite(s): CSE 100 and CSE 100L and CSE 120

7 credits

Year	Fall	Winter	Spring	Summer
2023-24			Section 01 Dustin Richmond (durichmo)
2024-25	Section 01 Staff
2022-23		Section 01 Dustin Richmond (durichmo)
2021-22			Section 01 Heiner Litz (hlitz)
2020-21			Section 01 Heiner Litz (hlitz)

Comments

Formerly CMPE 125

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